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Lowering Power at 28 nm with Xilinx 7 Series FPGAs

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Lowering Power at 28 nm with Xilinx 7 Series FPGAs
White Paper: 7 Series FPGAs




WP389 (v1.0) February 24, 2011



Lowering Power at 28 nm
with Xilinx 7 Series FPGAs
By: Jameel Hussein, Matt Klein, and Michael Hart




This white paper describes several aspects of power
related to the Xilinx 28 nm 7 series FPGAs,
including the TSMC 28 nm high-k metal gate
(HKMG), high performance, low power (28 nm HPL
or 28 HPL)
标签:赛灵思FPGA
Lowering Power at 28 nm with Xilinx 7 Series FPGAs
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