ISE 12 主要信息：部分可重配置技术

ISE 12 主要信息：部分可重配置技术
Partial Reconfiguration
Partial Reconfiguration (PR) is the ability to dynamically modify blocks of logic by downloading partial bit
files while the remaining logic continues to operate without interruption. Xilinx PR technology allows
designers to change functionality on the fly, eliminating the need to fully reconfigure and re-establish links,
dramatically enhancing the flexibility that FPGAs offer.

Partial Reconfiguration Software

With the release of the ISE Design Suite 12.1, a new era in Partial Reconfiguration has begun. The
software tools that unlock the capability to reconfigure a portion of a Xilinx FPGA while the rest of the
device remains operational have been completely redesigned. This next-generation solution utilizes
Partitions, a mature feature that guarantee