资料介绍
数据表Omneo P8Q PCMNumonyx Omneo P8P PCM
128-Mbit Parallel Phase Change Memory
Datasheet
Product Features
High Performance Read/Write Security
― 115 ns initial read access ― One-Time Programmable Registers:
― 25 ns 8-word asynchronous-page read 64 unique factory device identifier bits
Architecture 2112 user-programmable OTP bits
― Asymmetrically-blocked architecture ― Selectable OTP Space in Main Array:
― Four 32-KByte parameter blocks: top or Four pre-defined 32-KByte blocks (top or
bottom configuration bottom configuration)
― 128