74LS195A.pdf

74LS195A.pdf
54LS195A DM74LS195A 4-Bit Parallel Access Shift Register
June 1989




54LS195A DM74LS195A
4-Bit Parallel Access Shift Register
General Description Features
This 4-bit register features parallel inputs parallel outputs Y Synchronous parallel load
J-K serial inputs shift load control input and a direct over- Y Positive-edge-triggered clocking
riding clear All inputs are buffered to lower the input drive Y Parallel inputs and outputs from