资料介绍
CD4027 CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset
February 1988
CD4027BM CD4027BC Dual J-K Master Slave
Flip-Flop with Set and Reset
General Description Features
These dual J-K flip-flops are monolithic complementary Y Wide supply voltage range 3 0V to 15V
MOS (CMOS) integrated circuits constructed with N- and P- Y High noise immunity 0 45 VDD (typ )
channel enhancement mode transistors Each flip-
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