CIC Xilinx FPGA training - simulation flow with ModelSim

CIC Xilinx FPGA training - simulation flow with ModelSim
CIC Xilinx FPGA training



July 2004 1




After completing this section, you will be able
to:
Quickly realize the Xilinx FPGA Simulation Flow with
Modelsim
Use HDL Bencher to generate design testbench
Verify design through the simulation process




2
 3




ModelSim Design Entry XST, Synplicity,… ISE Design Creation
Inputs: Legacy HDL, legacy EDIF schematic,