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PLL design method

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Pll_Design_MethodMOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document by AN1253/D

AN1253 An Improved PLL Design Method Without ωn and ζ
Prepared by: Morris Smith

INTRODUCTION
This is a design guide for PLL synthesizers used in wireless products. It focuses on compact, low current and low cost synthesizers. Natural frequency and damping are not used in the calculations. The topics covered are: a) PLL
标签:DesignMethod
PLL design method
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