A CMOS 8-bit High-Speed AtoD C...

A CMOS 8-bit High-Speed AtoD Converter ICIEEE JOURNAL OF SOLID-STATECIRCUITS, VOL. SC-20, NO, 3, JUNE 1985

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A CMOS 8-Bit High-Speed Converter IC
AKIRA YUKAWA

A/D

Abstract ―A novel high-speed low-power CMOS balanced comparator’ circuit is proposed and implemented in an 8M fully parallel analog-todigitaf (A/D) converter IC. A 20-MHz sampling rate with 350-mW power dissipation from a single 5-V power supply has been realized. Integral linearity of + 1/2 LSB to 8-bit conversion has heen achieved through intensive transistor dimension optimization applied to the comparator circuit, instead of employing an offset canceling tecfudque.

circuits. However, if the time slot for comparison differs from the time slot for offset storage in an offset canceling technique, the stored offset voltage at the offset storage interval is not ex