资料介绍
扩展到N倍奇数分频方式
扩展到N倍奇数分频方式
module odddiv(rst,clk,clkout);
parameter N=3; //计数器的位数 N的最大计数值要大于或等于M
parameter M=7; //要分频的模,取奇数
input rst;
input clk;
output clkout;
reg tempp,tempn;
//assign clkp=clk;
//assign clkn=~clk;
reg [N-1:0] count;
always @(negedge rst or posedge clk)
if(!rst)
begin
count<=0;
tempp<=0;
end
else
begin
count<=count+1;
if(count==M/2)
tempp<=1;
else if(count==M-1)
begin
tempp<=0;
count<=0;
end
end
always @(negedge rst or negedge clk)
if(!rst)
tempn<=0;
else
tempn<=tempp;
assign clkout=tempp|tempn;
endmodule
测试代码:
`timescale 1ns/1ns
module odddiv_tp();
reg rst,clk;
wire clkout;
odddiv Odddiv(.rst(rst),.