DM 642的demo板原理图，使用philips的编解码器

dm642evm_Schematics 使用philips的编解码器1

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REV NOTES, UNLESS OTHERWISE SPECIFIED:
1. 2. 3. RESISTANCE VALUES IN OHMS. CAPACTITANCE VALUES IN MICROFARADS. B REFERENCE DESIGNATORS USED: A

DESCRIPTION
Initial schematic ready for layout. Sheet 2: Changed LENDIAN_MODE signal so R221 is a pull-up and S2 provides a pull-down. Sheet 3: Swapped DSP_SCL0 and DSP_SDA0 signals going to U16. Sheet 7: Added series terminations RN28, R246, R247, & R248. Sheet 11: Routed DC_A[8:6], UART_CSA#, & UART_CSB# to U15. Sheet 13: Changed bus routed to U53 to VP0D[9:2] and U52 to VP1D[9:2]. Sheet 15: Added pull-up (R241) to DC_ARDY. Sheet 17: Pin 177 is Ground not VCC Sheet 20: Changed U36 & U37 to SN74LVC1G125DCKR. Sheet Sheet Sheet Sheet Sheet fpga Sheet Sheet Sheet Sheet Sheet Sheet Sheet to 82 2: Changed EMAC_ENABLE to autodect S2 is no