INTELQ965芯片组原理图

BW_1p0_CustomerCR-1

:

@CBRVP_FAB_A_CRB_LIB.CBRVP_FAB_A_CRB(SCH_1):PAGE1

8

7

6

5

4

3

2

1

PAGE #

COMPONENT/FUNCTION

PAGE #

COMPONENT/FUNCTION

PAGE #

COMPONENT/FUNCTION

[1. [2. D [3. [4. [5. [6. [7. [8.
[9.

INDEX] BLOCK RESET CLOCK GPIO, DIAGRAM] MAP] DISTRIBUTION] IRQ, IDSEL MAP]

[48. [49. [50. [51. [52. [53. [54. & MISC
SUPPLY]

1394 1394 1394 1394 SERIAL SERIAL

1 OF 4] 2 OF 4] 3 OF 4 USB] 4 OF 4 USB] FLASH FLASH LAN LAN LAN PRIMARY] SECONDARY] 1 OF 3] 2 OF 3] & USB 3 OF 3]

[95.

EV PORT

80]

D

CPU-SOCKET] CPU-SOCKET] CPU TERMINATION
CPU PLL FILTERED

NINEVEH NINEVEH NINEVEH AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO

BROADWATER
U BTX
REFERENCE VALIDATION PLATFORM

P/U

P/D]

[55. [56. [57. [58. [59. [60. [61. [62. [63. [64. [65. [66. [67.

[10. [11. [12. [13. [14. C [15. [16.