三星S3C6410datasheet 1300多页

页面提取自－S3C6410X_UM_Preliminary_Rev0S3C6410X_UM_REV0.10

UART

31.6.3 UART FIFO CONTROL REGISTER Register UFCON0 UFCON1 UFCON2 UFCON3 Address 0x7F005008 0x7F005408 0x7F005808 0x7F005C08 R/W R/W R/W R/W R/W Description UART channel 0 FIFO control register UART channel 1 FIFO control register UART channel 2 FIFO control register UART channel 3 FIFO control register Reset Value 0x0 0x0 0x0 0x0

There are three UART FIFO control registers including UFCON0, UFCON1, UFCON2 and UFCON3 in the UART block. UFCONn Tx FIFO Trigger Level Bit [7:6] Description Determine the trigger level of transmit FIFO. 00 = Empty 01 = 16-byte 10 = 32-byte 11 = 48-byte Determine the trigger level of receive FIFO.1) 00 = 1-byte 01 = 8-byte 10 = 16-byte 11 = 32-byte Auto-cleared after resetting FIFO 0 = Normal 1= Tx FIFO reset Auto-cleared after resetting