新节点技术接口HSIC,USB3503

USB3503_WLCSP_Reference_Schematic5

4

3

2

1

USB3503 WLCSP Reference Schematic
D D

Refer to Datasheet for power sequencing information and for single supply configuration option.
VDDCORE VBAT

This portion of the schematic shows the minimum number of components needed for USB3503 to operate.

Reference Clock Input

REFCLK

VDD_PU

C3 0.1uF 10V

C4 0.1uF 10V

C

R2=R3=10k for 100/400kHz operation R2=R3=1k for 1MHz operation
R2 R3

A3

B2

C

B3

REFCLK

VDD_CORE_REG

VBAT

DATA STROBE

E2 E1

DATA STROBE

HSIC Upstream Port

I2C Interface

I2C_SCL I2C_SDA

E5 D5

SCL SDA

U1

Active Low Reset Input

RESET_N

E3

USBDN1_DP USBDN1_DM USBDN2_DP USBDN2_DM

A1 B1 C2 D2 C1 D1 A4 A5 A2 D3

DN1_DP DN1_DM DN2_DP DN2_DM DN3_DP DN3_DM

USB Downstream Port 1 USB Downstream Port 2 USB Downstream Port 3

RESET_N

Refer to Datasheet